UL ALAM, A.; MAJID, N.; ADITYA, S. Layout Design of a 2-bit Binary Parallel Ripple Carry Adder Using CMOS NAND Gates with Microwind. Dhaka University Journal of Science, [S. l.], v. 60, n. 1, p. 103–108, 2012. DOI: 10.3329/dujs.v60i1.10346. Disponível em: https://banglajol.info/index.php/DUJS/article/view/10346. Acesso em: 22 nov. 2024.