Ul Alam A, Majid N, Aditya S. Layout Design of a 2-bit Binary Parallel Ripple Carry Adder Using CMOS NAND Gates with Microwind. Dhaka Univ. J. Sci. [Internet]. 2012 Apr. 15 [cited 2024 Sep. 1];60(1):103-8. Available from: https://banglajol.info/index.php/DUJS/article/view/10346